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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Lecture Notes in Electrical Engineering)

Product ID : 35243168

Galleon Product ID 35243168
UPC / ISBN 9400798652
Shipping Weight 6.47 lbs
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Binding: Paperback
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Shipping Dimension 9.25 x 6.1 x 0.43 inches
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Edition 2013
Number Of Pages 174
Publication Date 2015-04-03
Release Date 2015-04-03
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Presenting a mathematical model for on-chip routers which can be used for NoC performance analysis, this book reflects the shift from computation- to communication-based design that has resulted from the increasing complexity of so-called ‘systems-on-chip’.