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Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590
Juried Engineering SN74HC590AN SN74HC590A SN74HC590

Juried Engineering SN74HC590AN SN74HC590A SN74HC590 74HC590 8-Bit Binary Counters with 3-State Output Registers Breadboard-Friendly IC DIP-16 (Pack of 10)

Product ID : 50336505


Galleon Product ID 50336505
UPC / ISBN 799993468132
Shipping Weight 0 lbs
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Model SN74HC590AN
Manufacturer Juried Engineering
Shipping Dimension 0 x 0 x 0 inches
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Juried Engineering SN74HC590AN SN74HC590A SN74HC590 Features

  • 2-V to 6-V VCC Operation

  • Counter Has Direct Clear

  • High-Current 3-State Parallel Register Outputs Can Drive Up to 15 LSTTL Loads

  • Low Power Consumption, 80-µA Max ICC, 8-Bit Counter With Register

  • Typical tpd = 14 ns, ±6-mA Output Drive at 5 V, Low Input Current of 1 µA Max


About Juried Engineering SN74HC590AN SN74HC590A SN74HC590

The 'HC590A devices contain an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features direct clear (CCLR)\ and count-enable (CCKEN)\ inputs. A ripple-carry output (RCO)\ is provided for cascading. Expansion is accomplished easily for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to the counter clock (CCLK) input of the following stage. CCLK and the register clock (RCLK) inputs are positive-edge triggered. If both clocks are connected together, the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the clock enable.